The Soft–IP taskforce prepares for this by performing a gap analysis and scope definition for evaluation of Soft–IP cores. The work builds on the methodologies that are in use for Secure Element (Smartcard chips) and the 3S in SoC. We identify the similarities and differences in the evaluation processes, the risks inherent to the Soft–IP supplier/consumer relationship and create a gap analysis of differences with the current evaluation processes.
The taskforce provides recommendations to the Eurosmart board for next steps, such as creating a new working group to develop a methodology for evaluating Soft–IP Cores and for using the results of such evaluation for the certification of silicon products.
(Synopsys)Director of the Soft IP Task force
Context The number of vulnerable devices on the market has resulted in an increased need for trust. Many new security standards, evaluations and certi...
19 February, 2021